Semiconductors are generally used in integrated circuits for a wide range of electronic applications, including radios, televisions, cell phones, and personal computing devices, as examples. Over the years of development of integrated circuit, the structures used to form the integrated circuit elements such as transistors and diodes have been continually reduced in size to enable production of ever more complex devices in small sizes, with improved performance, and with low cost. An example of a highly integrated semiconductor device is a dynamic random access memory (DRAM) device in which a large number of transistors are configured to store a substantial amount of digital information in a very compact size with relatively low cost.
A result of the evolution of the present technology using MOSFET technology is the inherent wide variation of characteristics of the circuit elements comprising the integrated circuit with ordinary manufacturing variations. For example, transistors such as MOSFETs exhibit wide variations in two critical characteristics, threshold voltage and switching speed. Variations in these parameters can result in corresponding performance variations in an end product such as power dissipation, which directly affects battery life in portable applications, and switching speed, which is a critical performance metric of competitive importance. Variations in threshold voltage and switching speed in MOSFETs are caused by unavoidable variations in device parameters such as gate oxide thickness, variations in various material impurities even at very low concentrations normally achieved in the refined semiconductor materials, variations in substrate doping density, variations in dimensions of the very small structures used to form the transistors, and variations in device operating temperature. However, to precisely control device parameters in manufacturing processes, and particularly to precisely control their variations against worst-case effects with sufficient precision to produce the necessary yield in a manufacturing operation is often impractical in the leading edge designs that utilize the smallest of feature sizes. The necessary manufacturing precision often requires unusual time and effort, and is generally inconsistent with the need to produce integrated circuits in high volumes at very low cost. Present alternatives are to make compromises in end product performance by widening design margins and to accept reductions in manufacturing yield, all of which ultimately contribute to increased costs or marketing issues. A further alternative to adjust device parameters such as threshold voltage by including an additional ion implantation late in the manufacturing process is generally considered to be impractical.
However, there is opportunity to adjust the threshold voltage of a MOSFET device by means of altering the substrate or well voltage and thereby alter a device operating characteristic. MOSFETs are usually thought of as three-terminal devices that include a source and a drain as principal current carrying terminals, and a gate with a voltage referenced to the source as a control terminal. However, MOSFETs also include a substrate (or body or well) connection that is usually internally coupled via a substrate ohmic contact to the source. This connection is usually not visible, and is usually not even mentioned on data sheets for discrete devices. As recognized in the art, providing a small positive bias voltage to the body relative to the source for n-type devices can reduce the threshold voltage, or providing a small negative bias voltage to the body relative to the drain for p-type devices can increase the threshold voltage. The inverse effect with opposite sign of the voltage changes is also operable. Analytic relationships between body bias voltage and the corresponding change in threshold voltage are given, for example, in R. F. Pierret, “Semiconductor Device Fundamentals,” Addison Wesley, 1996, pp. 680-681, which is incorporated herein by reference.
A number of techniques have been described in the prior art for adjusting a MOSFET threshold voltage by applying a bias voltage source to the semiconductor body. U.S. Pat. No. 4,142,114 describes applying a substrate bias voltage as function of an on-die sensed threshold voltage of a designated MOSFET, utilizing other MOSFET devices with similarly uncontrolled characteristics. U.S. Pat. No. 5,929,695 describes applying a predetermined substrate bias voltage to a well containing a first group of MOSFETs exhibiting a larger threshold voltage than another group, thereby reducing the threshold voltage of the first group. U.S. Pat. No. 6,218,895 describes providing a predetermined forward bias voltage to a group of MOSFETs so as to reduce their threshold voltage, thereby increasing their drive current for a given gate voltage, and disabling the forward bias voltage during standby periods so as to reduce leakage currents. The improvement disclosed in the U.S. Pat. No. 6,218,895 patent requires that the necessary forward bias voltage be predicted before manufacture. U.S. Pat. No. 6,232,827 describes increasing the net channel doping level in MOSFETs by at least 25%, which reduces the device threshold voltage, and then applying a compensating but predetermined forward body bias voltage to adjust the threshold voltage roughly back to the value that would have been obtained without the increased doping level. U.S. Pat. No. 6,605,981 describes a global body bias circuit utilizing a series arrangement of n- and p-type MOSFETs to match the leakage currents of other n- and p-type devices on the die, thereby attempting to balance the effects of manufacturing process variations on leakage currents and device switching characteristics.
A limitation of these prior art designs is their general inability after wafer and die processing to accurately compensate a die containing a plurality of MOSFET devices of a similar conductivity type and geometry by selecting and setting a body bias voltage for the general variation of characteristics resulting from observed manufacturing variations. By similar conductivity type and geometry we mean substantially the same doping type and profile and, for example without limitation, substantially a same dimension for a device structure. Parameter variations across a single die or even across a wafer containing thousand of dice are usually sufficiently small so that characterization of a device such as a transistor of a particular conductivity type and geometry allows reasonably accurate prediction of the characteristics of similar devices elsewhere on the same die or even the same wafer. Thus, measurements of a critical characteristic can generally be made of a manufactured device and a substrate bias voltage can be accurately determined and set for all devices of a similar conductivity type and geometry that balances a range of observed parameter variations. The effect can be reliably expected to properly compensate all devices of a similar conductivity type and with similar geometry on the same die or on the same wafer. The process can be repeated for other device conductivity types and geometries.